1. Field of the Invention
This invention relates generally to electronic power device packagings of a thin and compact nature and, more specifically, to a method for providing substantially inductance-free electrical leads or connections for such devices in order to enhance the beneficial diminution of the physical parameters (i.e., weight, volume, resistance and inductance) of such devices and packagings.
The teaching herein is directly mainly to the realization of a singular device, but may be readily extrapolated to the batch fabrication of similar devices, such as integrated circuits
2. Background Information
Previously disclosed lead or connector technology to use of high inductance wires with electronic power chip devices employs what is termed "gold bump technology". A plurality of gold contacts are used within the aforementioned devices in the form of a plurality of metallic gold conductive detents on selected contact pads of the chip. This technology is practiced in accordance with the teachings of U.S. Pat. No. 4,750,666, issued to Neugebauer et al. and assigned to the instant assignee, which patent is incorporated herein by reference. In the patented invention, the gold detents (termed "bumps") are characterized as essentially semihemispherical dots of metallic gold that are bonded directly to certain aluminum contact pads of the device. Recently, two of the instant inventors have made known the result of studies which reveal the existence of certain anomalies present on a gold (Au)--aluminum (Al) interface of the type generally employing a gold detent-to-device pad contact, as aforementioned. The identified aluminum, in the form of a stratum, results from the present practice of metallizing the semiconductor chip by applying, on desired chip surfaces, a thin layer of metallic aluminum. Under certain circumstances, there are formed at the intermetallic (Au--Al) zone of a gold-aluminum interface, several intermetallic compound phases comprising: Au.sub.4 Al, Au.sub.5 Al.sub.2, Au.sub.2 Al, AuAl and AuAl.sub.2, the last compound termed "purple plague". This Au.sub.x Al.sub.y formation, and accompanying Kirkendall void formation, is a problem known since 1975 in the aluminum bimetallic interconnection technology. A good deal of studies have now been performed in order to understand in detail the mechanism of the purple plague formation. Corrosion, induced by impurities such as bromides, fluorides and chlorides, at temperatures over 180.degree. C., accelerates purple plague formation, resulting in premature bond failure at the Au-Al interface. To reduce bond failure caused by purple plague and void formation, stringent control of chlorine, bromine and fluorine is employed. The purple plague formation is explained by a metal-metal diffusion phenomenon and thus it is likely to be present in any gold-aluminum interfacing. The rate of formation of the final stable compound depends on the reaction temperature and the proportions of gold and aluminum in the initial binary (Au--Al) film. First interaction occurs during heat treatment at about 100.degree. C. and produces an intermediate layer of Au.sub.2 Al, transitioning through a brief intermediate stage of Au.sub.5 Al.sub.2 formation. This process dominates until all aluminum has been consumed. Should the thickness of the aluminum stratum be larger than that of the gold, heating at 230.degree. C. converts low temperature-formed Au.sub.2 Al to AuAl.sub.2. Conversely, when the thickness of aluminum is smaller than that of the gold, the final phase will be a higher gold containing compound, such as Au.sub.4 Al, from the previous low-temperature Au.sub.2 Al. In all cases, the thickness of the developing compound layer is proportional to the square root of annealing time; this implies that all the interactions are diffusion-limited. In conventional gold wire bonding, there is always an excess of gold available (because some length of the gold wire must remain to provide a conductive path) and, where gold is always present in excess, the reaction continues, and purple plague formation may become critical. At normal operating conditions, the temperature of power chips should not exceed about 150.degree. C. and, under pristine conditions, purple plague would not present a problem. However, should the temperature exceed 200.degree. C. for long periods, or should halides of the aforementioned types be present, the chip contact will probably fail.
It may thus be seen that the multiple and varied intermetallic compound phasing, with accompanying Kirkendall void formation, presents a severe problem in gold-aluminum interconnection technology. The solution to this problem, as set forth herein, provides, quite unexpectedly, a way of further enhancing compact, thin-pack construction of semiconductor power devices.